A plasma display panel (herein after referred to as PDP) is a flat display device that takes advantage of radiation caused by gas discharge. The PDP has been in practical use in many fields such as an image display device and a public information display device, since the PDP can achieve high-speed display and be produced in a large size. There are two types of PDP, a direct-current (DC) type and an alternating-current (AC) type. Especially, the AC surface discharge PDP possesses a high technological potential for realizing a long life and a large-screen display, and therefore has been commercialized.
FIG. 10 is a schematic view showing a structure of a discharge cell (display cell), or a discharge unit, of a general AC PDP. A PDP 1x shown in FIG. 10 is constituted from a front panel 2 and a back panel 9 that are assembled together. The front panel 2 includes a front panel glass 3. A plurality of display electrode pairs 6 each composed of a scan electrode 5 and a sustain electrode 4 that are disposed on the surface of the front panel glass 3. A dielectric layer 7 and a surface layer 8 are layered in the stated order to cover the display electrode pairs 6. The scan electrode 5 and the sustain electrode 4 are respectively composed of a transparent electrodes 51 and 41 and bus lines 52 and 42 layered thereon.
The dielectric layer 7 is made of low-melting glass whose softening point is approximately 550 C.°-600 C.°, and has a current limiting function that is peculiar to the AC PDP.
The surface layer 8 protects the dielectric layer 7 and the display electrode pairs 6 from ion bombardment as a result of plasma discharge. The surface layer 8 also efficiently emits secondary electrons and lowers a firing voltage. Generally, magnesium oxide (Mgo) that has high secondary electron emission properties, high sputtering resistance, and high optical transparency is used to form the surface layer 8 with a thickness of approximately 0.5 μm-1 μm using the vacuum deposition method (Patent Documents 1 and 2) or the printing method (Patent Document 3). Note that a protective layer that has the identical structure with the surface layer 8 may be arranged in order to have the secondary electron emission properties and to protect the dielectric layer 7 and the display electrode pairs 6.
On the other hand, a back panel 9 includes a back panel glass 10 and a plurality of data (address) electrodes 11 disposed thereon so as to intersect the display electrode pairs 6 substantially at a right angle in plan view. The data electrodes 11 are used for writing image data in the discharge cells. On the back panel glass 10, a dielectric layer 12 made of low-melting glass is disposed to cover the data electrodes 11. Disposed on the dielectric layer 12 at a given height are barrier ribs 13 made of low-melting glass. More specifically, the barrier ribs 13 are composed of pattern parts 1231 and 1232 that are combined to form a grid pattern to partition a discharge space 15 into a plurality of cells. Phosphor ink of red (R), green (G) and blue (B) colors are applied to the surface of the dielectric layer 12 and the lateral surfaces 13 of the barrier ribs, and burned to form phosphor layers 14 (phosphor layers 14R, 14G and 14B).
The front panel 2 and the back panel 9 are sealed together around edge portions thereof such that the display electrode pairs 6 are orthogonal to the data electrodes 11 via the discharge space 15. In the sealed discharge space 15, a rare gas mixture such as xenon-neon or xenon-helium is enclosed as a discharge gas at some tens of kilopascals. The above is the structure of the PDP 1x. 
In order to display an image on the PDP, a method for displaying gradation of the image by dividing one field of the image into a plurality of subfields (S.F.) (e.g. intra-field time division grayscale display method) is used.
In recent years, there have been demand for low-power appliances, and similar demand is made for the PDP as well. In a high-definition PDP, the discharge cells are miniaturized and accordingly the number of the required cells increases. Thus, in order to generate an address discharge more securely, the operating voltage needs to be risen.
A conventional PDP has the following problems.
The first problem is that, when a pulse is applied to the display electrodes, a “discharge delay” which is a time lag between pulse application and discharge generation evidently occurs. Recently, in the field of displays including the PDP, the PDP tends to have high-definition pixels, and therefore the number of scan lines increases. A full-high-vision TV, for example, has more than twice as many scan lines as a conventional NTSC TV. Thus, as the higher-definition PDP has been developed, the PDP needs to be driven at a higher speed. For the high-speed drive, it is necessary for a width of a data pulse applied to the address period to be narrowed down. However, when the PDP is driven at the high speed by applying the narrowed width of data pulse, there is a smaller chance that the discharge is completed in duration of the narrowed pulse. Therefore, there is a risk that some of the discharge cells are not addressed properly thereby failing to light.
The second problem is that the temperature dependency on discharge delay increases with increase in Xe gas concentration in the discharge gas. More specifically, a high content of the Xe gas causes the discharge delay to be more dependent on temperatures, especially at a low temperature. Thus, the occurrence of the discharge delay becomes more problematic. This problem is actually crucial in the initial stage of driving the PDP.
The third problem is that the higher the concentration of Xe gas in the discharge gas is, the more dependent on the number of sustain pulses the discharge delay is (dependence of discharge delay on space charges). The discharge delay occurs more frequently when the number of pulses is small. For example, when the number of pulses in a subfield is relatively small, the discharge delay occurs more frequently.
To solve the above problems, several approaches have been made to reform the MgO, for example, by changing the crystal structure of the MgO protective layer or adding (i) Fe, Cr and V, or (ii) Si and Al to the MgO.
Patent Document 5 discloses the following to reduce the discharge delay. The MgO protective layer is formed with use of a gas-phase method on the dielectric layer or on the MgO deposition layer that is formed by a vapor deposition method or sputtering method. Alternatively, MgO powder that is formed by the gas-phase method is arranged on the dielectric layer.
Other approaches have been made to solve problems associated with the dependence of discharge delay on temperatures (discharge delay especially in a low temperature range) as follows. Patent Document 6 discloses an attempt to optimize an amount of Si that is added to MgO, and Patent Document 7 discloses another attempt such as adding Fe, Ca, Al, Ni and K as well as Si.
[Patent Document 1] Japanese Laid-Open Patent Application Publication No. H5-234519
[Patent Document 2] Japanese Laid-Open Patent Application Publication No. H8-287833
[Patent Document 3] Japanese Laid-Open Patent Application Publication No. H7-296718
[Patent Document 4] Japanese Laid-Open Patent Application Publication No. H10-125237
[Patent Document 5] Japanese Laid-Open Patent Application Publication No. 2006-54158
[Patent Document 6] Japanese Laid-Open Patent Application Publication No. 2004-134407
[Patent Document 7] Japanese Laid-Open Patent Application Publication No. 2004-273452